Leadership Team

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Jay Avula (CEO)

Jay has over 20 years of experience in VLSI design with more than 20 successful chip designs. His design expertise encompasses Analog & Mixed signal circuit design, DSP and Processor design. Prior to Eximius, Jay most recently served as Vice President of Engineering at Emulex Corporation. At Emulex, Jay was responsible for all Silicon technology from chip implementation to volume production as well as system level interface design. He joined Emulex through its acquisition of ServerEngines. Jay co-founded ServerEngines in 2004 and served as its Vice President of Technology.

Previously, Jay was Vice President of Technology at ServerWorks, where he directed the development of industry standard and proprietary high speed interfaces for several generations of the ServerWorks chipsets for Intel Processor based systems. Prior to joining ServerWorks, Jay held various engineering and management roles at Equator Technologies, a Multimedia DSP company, Ross Technology, a SPARC processor company and at Advanced Micro Devices.

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Sarang Padalkar (SVP)

Sarang has over 20 years of experience in VLSI design & verification. Sarang most recently served as Senior Director of Engineering at Emulex Corporation. At Emulex, he was responsible for the development of its flagship Converged Network Adapters (BladeEngine). Sarang led all engineering activities from design through production for multiple generations of the BladeEngine family of devices. He joined Emulex through its acquisition of ServerEngines. At ServerEngines, Sarang was responsible for the development of NetClient, a thin-client SOC with impressive multimedia capabilities.

Prior to ServerEngines, Sarang led the design of high-speed telecom & data communication ASICs at Catamaran Communications (acquired by Infineon). Previously, he was a lead CPU designer at Equator Technologies (a Multimedia DSP company) and at Ross Technologies (a SPARC processor company).

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Ravi Arikapudi (SVP)

Ravi has over 18 yrs of experience in designing multi-million gates, high speed, low power, first pass working SoCs and ramp to volume production. He is adept at managing/leading cross-functional programs and multi-site project environment. Ravi is often a key consultant in selection of custom silicon partners and tool vendors and has been responsible for setting up a very strong Physical design team across multiple organizations. Ravi has a Bachelor’s degree in ECE from Anna University, Madras, and Master’s degree in Computer Engineering from University of Idaho.

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Jaspi Sandhu (EVP)

Accomplished executive with proven track record of developing sales territories in North America, Europe and Asia. Jaspi holds an MBA from University of Chicago and MS from University of Massachusetts, Amherst. Live in Palo Alto, California.

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Arun George (VP)

Arun has over 20 years of experience in the Wireless Communication and Embedded software space across product and services companies. During his tenure in companies such as Microsoft & NXP Semiconductors, Arun successfully led large R&D programs involving smartphone chipset development & platform development, wireless protocol stack development as well as mobile application development. More recently, in the services space, he has built and managed high-performance engineering teams for market leaders in the Semiconductor, IoT and Automotive verticals.

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Bala Gorthi (VP)

Prior to joining Eximius Design, Bala was in Pure Storage (PSTG) where he was heading the WW Deals Desk team as a part of their Product management team. Before that he was with Cisco, in Marketing and Finance roles. Bala started his career as a DV engineer on ASICs at Sun Microsystems (now ORCL) working on 12 port-1GB switches. He has Verified, Designed and Architected many ASICs at Broadcom (BRCM) including their 56xx series switching chips. Bala has a BE from College of Engineering, Osmania University, ME in Electrical and Computer Engineering (VLSI and Networking) from Utah State University and an MBA from UCLA (Finance and General Management), Anderson School of Management.

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Bala Jeyabalan (MD)

Bala has a long track record of building and leading businesses in the Asia-Pacific region and United States. This includes 21 years of experience helping customers drive success in the enterprise software space, primarily with Business Intelligence and SAP software. Before joining Eximius Design, Bala was founder at Qualis Consulting, a provider of Business Intelligence technology and services for enterprise data analytics based in Singapore.


Bala has a Bachelor’s degree in Mechanical Engineering from Anna University, Madras, and Master’s degree in Computer Science from University of Missouri, Kansas City.

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Arun Venkatesan (AVP)

Arun has over 17 years of experience in ASIC and Physical Design . Prior to joining Eximius, Arun was with Qualcomm as Senior Manager CPU group , delivering high speed CPU IP’s for Mobile SOC’s. He has spent close to a decade in the Wireline division in Infineon Technologies contributing at various levels in multiple Networking SOC execution. Arun holds a MS degree in Microelectronics from Manipal University and Bachelors in Engineering from University of Madras.

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Sambasiva Rao (AVP)

Samba sir, as we call him, has over 34 years of VLSI Design, Product and Test engineering experience. Prior to joining Eximius design, Sambasiva held various engineering and management positions at UST Global, Cypress semiconductors and Bharat Electronics. He was responsible for building and developing large design teams across multiple organizations. He has led large cross functional teams in providing turkey solutions in SOC development space to major semiconductor partners. He currently leads Program management function at Eximius with a focus to boost engineering and delivery excellence and organizational growth.

Sambasiva holds Bachelor’s degree in ECE from Manipal Institute of Technology, Manipal and Master’s degree in Microelectronics from IIT, Madras.

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Surya Koneru (AVP)

Prior to joining Eximius, Surya was at Cadence IP Group as their Sr. Director – Design Engineering Group. There he managed the Mobile PHY Analog & Digital Design, Full Custom Layout, and Physical Design teams. Before that, Surya was at Cypress Semiconductors, where he was working as Sr. Director Design Engineering, leading their central R&D teams. In this role he managed engineering teams across RTL & Analog IP design, custom layout and full chip SOC integration/methodology. Prior to Cypress, Surya worked with Montalvo Systems, Intel & Integrated Device Technology where he built and led engineering teams. Through his 26+ years of engineering executive leadership, he has taken more than 25 ASICS/SOCs and systems from conception to production. He brings in diverse experience in developing SRAM, Memory & IO controller chipsets, CPUs and micro controllers and has successfully led them to High Volume Manufacturing. Surya heads the Analog design team at Eximius

He earned his Master’s Degree in Electrical Engineering from Arizona State University and Executive MBA Degree from Santa Clara University.

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Viresh Hingarh (Sr Director)

Viresh brings more than 18 years of experience in ASIC and Physical Design. Viresh currently leads the US based Physical Design team at Eximius. Prior to Eximius, Viresh was Principal Engineer at Emulex leading the physical implementation multiple SoC designs. Viresh received his Bachelors in Computer Engineering from Cal Poly – San Luis Obispo and his Masters in Electrical Engineering from Santa Clara University.

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Pani KR (Director)

Pani is an accomplished and result oriented Engineering professional with over 17 years of experience in Projects and Program delivery for Semiconductor and Embedded software verticals. Pani has developed high performance teams from scratch and collaborated with cross functional and global teams towards continuous improvement on quality, cost and productivity Pani’s focus areas are in Multimedia codecs, Frameworks, Controller firmware and Digital Signal processing.

" The art challenges the technology, and the technology inspires the art."

John Lasseter