Requisition : EXUS/110
Experience : 5 year
Location : USA
Eximius Design is seeking an outstanding ASIC Verification Engineer in San Jose, CA.
This position offers the opportunity to work on a state-of-the-art technology and have a real impact in a dynamic, technology-focused company impacting product lines ranging from Augmented Reality, IOT, Virtual Reality, Cloud Infrastructure and Networking.
- Very strong DV engineer capable of working independently.
- Write and augment existing testplans.
- Implement testbench and scoreboards / checkers.
- Implement test sequences as per plan and debug failures
- Achieve 100% functional and code coverage
- Work closely with designers, micro architects & f/w to resolve issues
- 5+ years of proven experience as a DV engineer
- Hands on experience with SV and UVM
- Hands on Experience with executable test plans and Coverage Driven verification
- Hands on Experience with Synopsys VCS / Verdi or Cadence Incisive to
- Familiarity with C/C+
- Python (or similar) scripting language
- ASIC design experience
- Good communication skills, open and collaborative working style, team player
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Eximius Design and its related business units provide Equal Employment Opportunity (EEO) to all qualified applicants without regard to race, color, religion, sex, or national origin.